Electronics Weekly
At DAC 2025, Ausdia introduced Timevision OneSource which automatically generates a new version of block-level constraints after optimisation engines have worked on hierarchies, duplicate elements and performed advanced transformation.
Such optimisations can save two weeks of manual iteration and improve PPA but can also render original programmatic SDC constraints unusable in their original form, explained CEO, Sam Appleton.
Timevision OneSource automatically translating source constraints to work seamlessly with post-optimisation netlists to preserve the golden, hand-written timing constraints throughout the entire design flow. It automatically generates a new version of block-level constraints that can be used for full-chip signoff, eliminating the time-consuming and error-prone manual constraint adaptation process.
Maintaining source form constraints ensures confidence in signoff checks, said the company.
In addition to automated translation and source preservation, it offers full-chip compatibility, with automatic generation of constraints that are compatible with post-optimisation netlists. There is also quality assurance with verification and validation of constraint translation accuracy.
OneSource integrates seamlessly with the existing Timevision platform, supporting more than one billion cells and thousands of clocks throughout the design flow, from pre-synthesis to signoff timing.
Other DAC 2025 news:
Two software tools target efficient design of 2.5D and 3D ICs
