Electronics Weekly
NeuraScale is designed to overcome critical scaling and data movement challenges in AI infrastructure that are driving advanced SoCs and emerging 3D chiplet-based designs, explained COO, Nandan Nayampally.
Crossbar switching architectures struggle to keep up with the performance, throughput and efficiency levels of AI workloads, he continued.
The patent-pending NeuraScale switch fabric supports 256 ports per chiplet with 1Tbps throughput and achieves 2GHz+ operation in 4nm technology with less than 20ns maximum latency and 2048-bit data width for efficient data transfer.
The modular architecture simplifies physical implementation for each SoC while enabling seamless scaling across multiple chiplets.
It is also protocol-ready with support for AMBA protocols and it is designed for future UALink, UCIe and Ultra Ethernet compliance.
When combined with Baya Systems’ WeaverPro software that streamlines design, analysis and optimisation, NeuraScale accelerates development cycles, claimed the company. It simplifies large-scale interconnect implementation, overcomes bottlenecks in traditional crossbar architectures and offers multi-protocol support to ensure interoperability and adaptability for AI-driven data centres.
