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Agentic AI platform automates three stages of design

All three stages of chip design will be automated and accelerated, says Moores Lab AI, which has introduced four design tools using agentic AI.

Shelly Henry CEO Moores Lab AI

Agentic AI is one of the buzzwords at this year’s DAC in San Francisco. Whereas generative AI generates content, agentic AI is an automation process. It autonomously makes and acts on decisions with little human intervention.

The platform consists of tools which automate design, verification and implementation. The verification tool, MooresLabAI VerifiAgent is currently in beta testing with 25 companies, revealed CEO Shelly Henry.


It automates test bench creation, test planning and implementing test cases and running simulations. It is available now.


“Currently verification engineers look at the spec and design and create the test plan manually in around three weeks,” explained Henry. Using VerifiAgent, this can be done in 10 hours, he said.

Creating the testbench with thousands of lines of UVM code can take a team three months to finalise. Henry says that this can be done in two weeks using the agentic AI tool.

Other tools, due to be released by the end of this year, address design (DesignAgent) and the physical design, layout and masking stages (PDAgent).  Before then, SpeciAgent will be released in around three months’ time, said Henry. This is for architects to plan according to a specification, considering which generation PCI, and compatibility with memory elements, for example.

The timing has been driven by customer demand, said Henry. There was more interest in accelerating this stage of the chip design.

Henry estimates that VerifAgent accelerates time to market by a factor of seven and lowers engineering costs by over 80%. The obvious fear is that these tools will negate the need for verification engineers. Henry is quick to set the record straight: “It enhances the verification team,” he insisted. Using the tools, small teams can do big chips and one team can be four chips simultaneously he said.

Related DAC news:

Switch fabric scales up data movement for AI  

Two software tools target efficient design of 2.5D and 3D ICs

Caroline Hayes

Caroline Hayes

Caroline Hayes is the editor of Electronics Weekly. She has been covering the electronics industry for over 30 years, edited UK and pan-European titles and contributed to UK and international online and print publications. Although specialising in the semiconductor market, she also has a keen interest in education, careers and start-up opportunities in the broader electronics industry.

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