FPGA / PLD

Altera claims the latest version of its Quartus II FPGA design software will cut compile times by 30% on average compared to the previous version. In some cases compile time can be cut by up to 70% through algorithm optimisation and increased parallelisation, said Altera. The software also includes the Rapid Recompile feature which allows for small source code changes on Altera Stratix V FPGA designs resing previous ...

Lattice Semiconductor has added new hardwired IP functions to its iCE40 range of low power and low density FPGAs. A new smaller package size is 1.4mm x 1.48mm x 0.45mm. The iCE40LM FPGAs have hardwired IP for strobe generators, I2C and SPI interfaces. The FPGAs with active power consumption of 1mW. “This means it is an order of magnitude lower ...

Altera has been upgrading its IP core offering specifically for FPGAs and system-on-chip (SoC) devices designed for the 28nm process node. In the last 12months it has released more than 15 new protocol interface IP cores. Altera claims the IP cores in expanded IP portfolio have been upgraded to deliver 15% timing margin for faster timing closure. The portfolio of ...

Microsemi has introduced a PCI Express compliant form factor evaluation platform for its IGLOO2 FPGAs. The IGLOO2 FPGA evaluation kit includes a PCIe control plane demonstration design for the development of transceiver I/O-based FPGA designs to build PCIe and Gigabit Ethernet-based systems. The kit uses a standard laptop with an ExpressCard slot or a desktop with a PCIe slot. The kit includes a 12k logic ...

Lattice Semiconductor’s latest MachXO3 FPGA is designed as a small package, low cost device offering interfaces using both parallel and serial I/O. According to Brent Przybus, director, product and corporate marketing at Lattice: “As system performance and complexity increases, I/O interfaces often become the bottleneck. Designers want to use the most advanced components, but have to deal with any number of ...

These cores can be used for building systems requiring very high throughput-rate standard Ethernet connections, including chip-to-optical module, chip-to-chip,

Lattice Semiconductor has announced availability of its MachXO2 family of programmable logic devices in a 32 QFN (Quad Flatpack No-leads) package

Microsemi has announced the availability of an LCD display reference design for industrial and medical applications based on its SmartFusion FPGA-based system-o

Microsemi has announced the release of Libero SoC v10.0, the new version of its Libero integrated design environment (IDE) for its SmartFusion FPGA-based device

Lattice Semiconductor is offering its ECP3 FPGA-enabled Sercos III module for real-time industrial networking applications