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FPGA / PLD

The latest Electronics Weekly product news on FPGA (field-programmable gate array) and PLD (programmable logic device) devices to be (re)configured by a user after manufacturing.

JTAG interface for FPGA development

Posted on 12th November 2004 | Modified on 25th June 2025 FPGA / PLD Leave a comment

Design tool firm Altium's latest JTAG interface is intended to allow system developers to use the firm's Nexar test tool with...

ARINC 429 interface for FPGAs

Posted on 28th October 2004 | Modified on 25th June 2025 FPGA / PLD Leave a comment

Memec Unique is offering a bus interface IP core for Actel FPGAs that implements the ARINC (Aeronautical Radio, Inc.) 429...

CPLD has 304MHz top speed

Posted on 21st July 2004 | Modified on 25th June 2025 FPGA / PLD Leave a comment

Look-up-table based complex PLD has equivalent of 980 macrocells

Rad-hard FPGA has built-in single event upset protection

Posted on 4th May 2004 | Modified on 25th June 2025 FPGA / PLD Leave a comment

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FPGA / PLD

JTAG interface for FPGA development

ARINC 429 interface for FPGAs

CPLD has 304MHz top speed

Rad-hard FPGA has built-in single event upset protection

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