FPGA / PLD

Xilinx’s All Programmable Zynq UltraScale+ MPSoC has been supported by a commercial real-time operating system (RTOS) from Micrium. The Zynq UltraScale+’s quad-core ARM Cortex A53 and dual-core Cortex R5 CPUs will run the Micrium µC/OS-II, µC/OS-III kernels and full suite of RTOS components, the company says. They will also run on the Xilinx MicroBlaze FPGA-based soft processor core which can ...

Cypress Semiconductor has doubled the memory capacity on its Bluetooth Low Energy enabled PSoC 4 and PRoC programmable radio-on-chip devices. The programmable devices now have 256kbyte of flash and 32kbyte of SRAM. The additional memory capacity is intended to support over-the-air (OTA) firmware upgrades. The PSoC’s development IDE called Creator supports the Bluetooth Low Energy configurations. The devices integrate a ...

Rochester Electronics is now offering a number of Altera’s mature FPGAs and CPLDs to provide long-term supply of devices for applications with extended lifespans. Rochester will market the products with the manufacturer’s full support. Devices covered by the agreement include select MAX 7000 CPLDs and FLEX, APEX and Stratix GX FPGAs. Users of these FPGAs and CPLDs will have a secure ...

Microsemi has introduced a range of radiation-tolerant FPGAs intended for space applications requiring up to 150,000 logic elements and up to 300MHz of system performance. Typical uses for RTG4 include remote sensing space payloads, such as radar, imaging and spectrometry in civilian, scientific and commercial applications. Other applications include mobile satellite services (MSS) communication satellites, as well as high altitude aviation, ...

Xilinx continues to introduce FPGA development tools which it expects will make design of programmable devices accessible to a range of non-specialist developers. The SDSoC for the company’s Zynq All Programmable SoCs and MPSoCs is configured to simplify device programming by using an Eclipse integrated design environment (IDE). The intention is to support system-level design and the tool has a ...

Pro Design has introduced a system-on-chip development module based around Xilinx Zynq-7000 FPGA. The Zynq XC7Z045 or XC7Z100 combines a user FPGA with an ARM core processor (dual ARM Cortex-A9 MPCore with CoreSight) and several on board peripherals such as USB 2.0 OTG, Gigabit Ethernet or ARM JTAG debug. The module offers a direct ARM debug interface that you user can benefit and use the proven ARM ...

Lattice Semiconductor and Cypress Semiconductor have worked together on a reference design for a bridge between USB 3.0 and high definition video interfaces such as HDMI and SDI audio/video. The USB 3.0 Video Bridge development kit combines a LatticeECP3 FPGA and the Cypress EZ-USB FX3 USB 3.0 peripheral controller. USB 3.0 supports 5Gbit/s data rates which can be used for ...

Lattice Semiconductor has extended its iCE40 low power FPGA family with iCE40 Ultra. The devices are intended for use adding functions to products – for example: infrared remote, barcode, touch, user identification, and pedometer functions. On the silicon are non-programmable blocks including LED drivers, multipliers-and-accumulators, and serial interfaces. “This ASSP-like integration reduces system power and speeds implementation so designers can ...

Embedded microprocessor designs can benefit from safe and secure boot-up code by making use of the trusted boot-up code held in an FPGA. A secure boot reference design from Microsemi uses the security features in its SmartFusion2 SoC FPGAs to securely boot any application processor in an embedded system. The intention is to ensure that processor code can be trusted during execution. “Very few processors ...

Avnet has partnered with Rohm Semiconductor to develop a power supply module board specifically for Xilinx 7 series FPGAs and Zynq-7000 all programmable SoC’s evaluation kits. Rohm’s power supply module is used with the Avnet-designed Mini-Module Plus Development System. Based on the BD95601MUV/BD95602MUV power supply ICs, it is designed to meet the FPGA’s power tolerance and sequencing guidelines for startup ...