Asenov

A UK consortium is setting up the Virtual Reality Semiconductor Fabrication Training Facility (VRSFT), funded by a £500,000 Innovate UK grant. It is being delivered by a partnership of: semiconductor IP source Semiwise, industry body TechWorks and NMI (National Microelectronics Institute), plus Pragmatic Semiconductor as a consultant. “In the UK, we have numerous small to medium sized specialist chip companies ...

Nanowire transistors are the most likely successor to finfets and will scale to 5nm, says Professor Asen Asenov, Professor of Electrical Engineering at Glasgow University and CEO of Gold Standard Simulations (GSS) which specialises in the predictive simulation of nano-CMOS devices including statistical variability and reliability.

Intel’s 14nm process has done something which is “almost a miracle – extremely impressive,” says Asen Asenov, professor of electrical engineering at Glasgow University  and CEO of  statistical analysis specialist Gold Standard Simulations (GSS).

FD-SOI with metal gate last will be the winning process technology for low power products at 28nm and 20nm, with finfets proving to be a second-class solution, says Professor Asen Asenov, Professor of Electrical Engineering at Glasgow University who is founder and CEO of the leading statistical variablity company Gold Standard Simulations.

Intel’s triangular finfets suffer a severe performance disadvantage to rectangular finfets and a further disadvantage in respect to SOI finfets, says Professor Asen Asenov of Glasgow University who is the CEO of Gold Standard Simulations.

Intel's finfets are a 'complicated and difficult' technology solution, says Professor Asen Asenov of Glasgow University and founder and CEO of Gold Standard Simulations (GSS) the leading CMOS statistical variability simulation house.

Intel’s finfets are the topic du jour in the IC industry and Professor Asen Asenov of Glasgow University and CEO of Gold Standard Simulations has thrown light on the reason for their unusual shape.

SOI finfets will scale to 11nm, according to Professor Asen Asenov, which means they will be useful for at least three generations of process technology.

Glasgow University's Professor Asen Asenov is leading the key team in an EU funded group who are looking at ways of designing memories which take into account the variability and unreliability...