By the end of 2024, the DRAM industry is expected to have allocated approximately 250K/m (14%) of total capacity to producing HBM TSV, with an estimated annual supply bit growth of around 260%, says TrendForce svp Avril Wu. HBM’s revenue share within the DRAM industry—around 8.4% in 2023—is projected to increase to 20.1% by the end of 2024. The die ...
JEDEC has published a new JESD318 Compression Attached Memory Module (CAMM2) Common Standard, which defines the electrical and mechanical requirements for Compression-Attached Memory Modules. It covers both Double Data Rate, Synchronous DRAM Compression-Attached Memory Modules (DDR5 SDRAM CAMM2s) and Low Power Double Data Rate, Synchronous DRAM Compression-Attached Memory Modules (LPDDR5/5X SDRAM CAMM2s). The standards body highlights that DDR5 and LPDDR5/5X ...
Teledyne e2v is shipping 4byte radiation-tolerant space-grade DDR4 memory. The device, called DDR4T04G72, is a 15 x 20 x 1.92mm multi-chip module that can operate at 2.4Gtransfer/s. Its bus assigns 64bits to data and an additional 8bits to error correction. The company sees it being used with its own Qormino processors, and the memories are compatible with “the vast majority of processors, ...
Alliance Memory has introduced fast 128 and 256Mb CMOS synchronous DRAMs in 54ball TFBGA packages. Sized 8x8x1.2mm, the memories are 8Mx16 and 16Mx16 with...
Toshiba will launch a range of CompactFlash memory cards for the DSLR camera market in spring 2013
With more processor cores integrated into a single chip, board-level designers need to find space for the additional memory required to support higher levels of processing power
Micron and Samsung are the founding members of the Hybrid Memory Cube Consortium (HMCC), and will work with fellow developers Altera, Open Silicon and Xilinx to bring the technology to market
Microsoft's Munich-based technology centre has worked with Samsung Electronics to assess the impact of 30nm semiconductor technologies on power consumption in data centers
Starting this month, Samsung began mass production of high-performance 20nm-class NAND flash memory chips, with a projected volume of more than 10,000 12-inch wafers monthly
Samsung is looking to cut server heat with "20nm-class" DRAM chips, it said. The firm is secretive about process details, and by 20nm-class it means 20-29nm feature size. "We plan to ship...
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