Circuit design

In an invited paper for the International Electron Device Meeting (IEDM) in Washington DC this week, Dennis Buss of Texas Instruments talked about his experience in developing ultra-low power systems, something that he has been specialising in for the past few years.

In an article for Low-Power Engineering, William Ruby, senior director of RTL power product engineering at Apache Design Solutions outlines the top five reasons he has found why customer designs don’t go according to plan when it comes to meeting their power budgets. Some of the items on the list seem obvious, such as an inefficient overall architecture and implementation. ...

Low-power design and fast testing at the fab are not happy bedfellows. As Giri Podichetty of Mentor Graphics explains at Semiwiki and in a white paper, “the goal of automatic test pattern generation (ATPG) is to achieve maximum coverage with the fewest test patterns. This conflicts with the goals of managing power because during test, the IC is often operated ...

In any synchronous system, the clock can consume as much as 40 per cent of chip power. That is not likely to change as more designers attempt to take advantage of the power savings otherwise available by moving to the ultra-low voltage (ULV) or near-threshold voltage regime. Although we can expect extensive use of clock and power gating in the ...

The leading circuits conferences in 2012 are lining up to have a strong focus on low-power design. February’s International Solid State Circuits Conference (ISSCC) has, among other things, a course on low-power analogue signal processing and a forum on power and performance optimisation of many-core processor SoCs – so it spans the gamut of CMOS design.

In the days when the mobile phone was used purely for talking to people, the power efficiency of the audio playback was not a huge concern. Unless the circuitry was especially inefficient it would always be dwarfed by the energy needed for the RF subsystem. Now, the phone is more likely to be used as a media player and long-term ...

The emphasis of the IEDM conference is shifting away from peak speed to more of a tradeoff between power and performance, with several papers reflecting the need to move away from traditional transistor metrics such as current drive.

At the Intel Developers Forum, the chip giant’s chief Paul Otellini described how work at the company would yield more power-efficient processors, potentially running from solar power. For a company that is not readily associated with ‘low power’, Intel is doing what it can to present itself as an alternative to one that is: ARM. However, both are looking at ...

In late August, Freescale Semiconductor, Intel and Marvell Technology were hit by a patent suit by the largely unknown company Power Management Systems, which claimed the three chipmakers infringed on its US patent, number 5,504,909. The action is potentially troublesome for an industry that has come to rely on power gating as an energy-management technique. The patent does describe, albeit ...

ARM has decided to extend its relationship with the University of Michigan low-power electronics research team that ARM R&D vice president Krisztián Flautner worked with before joining the IP company. According to Peter Clarke at EETimes: “The five-year, $5 million extension of an existing research partnership will run until 2015 and cover technology for ultra-low energy computing and applications areas ...