Electronics Weekly
The event for chip architects, design verification engineers and IP integrators is sponsored by Accellera Systems Initiative. This year’s keynotes reflect the design and verification methodologies and standards for the IoT, machine learning, and automotive safety.
On the first day of the Design and Verification Conference (DVCon) Europe 2018, Dr. Stefan Jockusch, vice president of strategy at Siemens PLM Software, will present the keynote speech “Driving Digitalization With A Boundary Free Innovation Platform.” Philippe Magarshack, group vice president of the MDG Group at ST Microelectronics will present “Accelerating IoT Device Development – from Silicon to Developer Tools” to open the conference’s second day.
Dr. Jockusch’s keynote will examine the need for ‘digital twins’ in the production and testing of products and services and how its use is affecting the design process for software and components in the fields of the IoT, autonomous vehicles and additive manufacturing.
Magarshack will look at the challenges faced by SoC developers to meet the pace of growth for the IoT as well as consider IoT applications.
The two-day event will also include panel sessions, papers, 16 tutorials and an exhibition with demonstrations from EDA tool, IP and service providers.
Topics to be covered are system level design and software-driven verification, advanced verification and validation, functional safety and machine learning, IP reuse and design automation, analogue and mixed signal design and verification and open source processor and IP methodologies.
This year’s Design and Verification Conference (DVCon) Europe will take place at the Holiday Inn, Munich city centre, Germany, 24 to 25 October. Registration is now open.
A SystemC Evolution Day, will be held on 23 October. This full day, technical workshop will include sessions around current and future standardisation around SystemC.
