Electronics Weekly
sureCore chose the Leuven location to tap into the design ecosystem around imec and to maximize imec’s recently announced investment in the company.
The design centre focus on developing production-ready, low power, low voltage capable SRAM designs that can be easily integrated into SoCs. It will be headed by Dr. Stefan Cosemans, who spent the last 10 years focusing on variability tolerant, low power SRAM design techniques.
“The Leuven Design Centre is a huge step forward, allowing sureCore to shorten cycle times to production ramped products,” says Paul Wells, sureCore’s CEO (pictured), “the initial team staffing this facility has numerous patents to its credit, positioning it as a centre of low power SRAM excellence right from the start.”
The new centre extends the design expertise of the sureCore technology team by adding key personnel whose principal focus is on low power SRAM design. The Leuven team will accelerate the optimisation of the sureCore world-class, low power technology and ensure its production readiness.
sureCore’s low power SRAM IP technology is particularly attractive to battery-critical applications – 28nm test chips run in March last year delivered more than 50% power savings versus industry-standard SRAMs.
