Electronics Weekly
Unveiled this week, Nios-II has several times the performance of Nios, but perhaps more importantly the user experience has been simplified.
“With Nios a lot of our customers were hardware engineers, plus a few software engineers,” said Pat Mead, technical marketing manager. “As we go up in Mips value, we have to do more for the software engineers.”
SOPC Builder allows the processor, or many of them, to be configured on Altera’s Avalon switch fabric bus, along with peripherals from a library.
One of the key aspects of the IDE and SOPC Builder is the ability to add custom instructions. Once a software bottleneck is identified the errant code is removed and replaced with a custom instruction called as a C subroutine.
SOPC Builder configures the new hardware block on the bus and imports the VHDL or similar code for that block into the Quartus tool.
The popularity of Nios has come as something of a shock to Altera. The firm said it sold more than 12,000 development kits in the first three years, and is still selling over 1,000 kits per quarter.
“Some customers are using Nios as the core datapath processor, including parallel processing with custom instructions,” said Hollingworth.
The threat o f hardware obsolescence is another driver for Nios, he said. “People are hugely concerned about obsolescence. On of the unexpected things we have found with Nios was people knew it wouldn’t be made obsolete.”
Once customers have the design kit and source code, the processor can be continually used, migrating from one FPGA architecture to another.
